The present invention relates to a data symbol counting device, synchronizing device and method. More particularly, it relates to a flexible means of counting consecutive data symbols, for instance to allow synchronization with an external device on the basis of the number of received symbols.
It has been proposed to allow two-way communication of information over a cable or satellite network. In such a system, it is necessary for the end users to be synchronized with the rest of the network. In this respect, the Media Access Control (MAC) layer of the protocol between the head end service provider and the end user terminals may be used to indicate synchronization information to all of the end users. In particular, as part of a MAC message, an Upstream Slot Marker Pointer may be used to indicate the start of a 3 ms marker. The three millisecond marker indicates the start of a three millisecond period for upstream transmission to the head end service provider and the Upstream Slot Marker Pointer indicates the number of downstream data symbols to be counted from the start of the next MPEG packet to the start of the three millisecond marker.
Unfortunately, current tuner technology does not directly provide symbols as an output to the rest of an end user terminal. Instead, tuners reformat received data into bytes with an associated clock-signal, which cycles only once every 8 data bits. Since, as described above, the synchronization information in the MAC message relates to a count of the number of symbol clocks, there is no direct way for an end user to synchronize with the received signal. In particular, there is no direct way of counting symbol clocks from the available byte clock that is output by the tuner.
The use of software to correct between the byte clock and the symbol clock is not feasible due to the time critical nature of the correction. In particular, if the MAC supplies only a small count value, i.e. a small number of symbols to count, a processor may not be able to respond to the event within sufficient time. It is also difficult to determine how much time elapses before the processor is able to modify a counter value, which will therefore affect the amount of correction applied.
The use of phase-locked loops might be considered. However, phase-locked loops are not cheap and the design techniques for reliable operation are not trivial.
According to the present invention, there is provided a method of counting the number of consecutive data symbols in a stream of data bytes, the method comprising:
maintaining a count which is incremented/decremented for each respective consecutive data byte of said stream; and
after every occurrence of a predetermined number of consecutive data bytes, incrementing/decrementing the count by an adjustment value determined according to the ratio of the number of bits in the bytes to the number of bits in the symbols, such that the count represents a count of data symbols.
According to the present invention, there is also provided a device for counting the number of consecutive data symbols in a stream of data bytes, the device comprising:
a main counter for maintaining a count which is incremented/decremented for each respective consecutive data byte of said stream; and
adjustment means for incrementing/decrementing the count of the main counter, after every occurrence of a predetermined number of consecutive data bytes, by an adjustment value determined according to the ratio of the number of bits in the bytes to the number of bits in the symbols, such that the count represents a count of data symbols.
In this way, it is not necessary for a device to include the additional circuitry required to produce a symbol count. The device may use a standard byte count to synchronize with received symbols. Indeed, it is therefore not necessary for a device to be manufactured specifically for a particular-type of data modulation.
The present invention also provides a device for generating a synchronization signal from a received MPEG data stream with a MAC message containing an Upstream Slot Marker Pointer, the device including:
a device as defined above;
a controller for starting said main counter according to a received MPEG synchronization signal; and
synchronization means for generating the synchronization signal once the main counter has counted the number of symbols indicated by the Upstream Slot Marker Pointer.
There is also provided a corresponding method.
In this way, it is not necessary to provide additional complicated hardware to count data symbols. A standard receiver/tuner may be used and synchronization achieved by means of its output byte clock.
Preferably, latches are provided for the predetermined number and the adjustment value.
In this way, the device may easily be set according to the particular modulation scheme with which it is intended to be used.
Preferably, the adjustment means includes an adjustment counter for respectively counting the predetermined number of consecutive data bytes.
In this way, the adjustment counter may be loaded with a value from its latch and then count down for each byte clock. Upon reaching zero, the adjustment counter may be reset to the number of the latch and the value in the main counter modified according to the adjustment value.
Preferably, the device may be implemented in an erasable programmable logic device.
In this way, the various numbers and values may be easily set according to the modulation scheme under which the device is intended to be used.